Energy Efficient Power Management For Wireless Applications

Acronym: PowerDCDC
Start: 07.2008
End:   06.2011


Abstract
The trend in recent hardware system designs, especially when they are battery driven (e.g. notebooks, cellular phones or handhelds), is to operate the different components of the system (RF circuits, baseband processor, etc. in case of a cellular phone) with different supply voltages, in order to achieve optimum performance and high power efficiency. The task of a DC-DC converter is to produce this variety of required supply voltages by decreasing or increasing the voltage level offered by the source power supply (e.g. a battery).

New challenges
The challenging part is to perform this voltage conversions as power efficient as possible. Traditionally, such DC-DC converters were implemented as analog circuits, but recently more and more functionality is implemented by digital circuitry. This offers more flexibility on the one hand, and offers the opportunity to integrate more complex, maybe even adaptable control logic, on the other hand.

The goal of the project
The project, in co-operation with Infineon Technologies, aims to investigate and also develop a pulse width modulation (PWM)-based digital control logic for future DC-DC converters, with the goal to reduce the overall power consumption. As a first step, the analog components of the DC-DC converter must be known in order to control the circuit in an optimized fashion. It might be necassary to investigate adaptable control logic, which autonomously can estimate the parameters of the external elements (tolerances of coils, capacitors, etc.).

Research results
With a more accurate knowledge of the control path, the control process can be optimized. Furthermore, power savings can possibly be achieved by optimizing the transient effects when turning the circuit on and off, which is a common task in modern designs, where only active hardware blocks are powered on. The research results should be verified by simulations and by measurements on real prototype hardware on silicon in 65 nm technology.